Patent · US Expired

Method of making a three-dimensional integrated circuit

US5877034A · kind A · utility

233Cited by
12References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 22, 1995
Grant dateMar 2, 1999
Priority date
Expiry dateSep 22, 2015

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method of making a three-dimensional integrated circuit by transferring fully processed devices from a device layer of first substrate to an auxiliary substrate, separating the auxiliary substrate and the devices thereon into individual chips, testing the chips for their functionality and mounting functioning chips on a carrier substrate in a side-by-side arrangement to form a device layer therein and thereafter mounting a further device layer on said device layer of said carrier substrate. Electrical inter-connection are formed between the devices of said to layers through passage ways in their respective substrates.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.