Metallic electronic component packaging arrangement
US5877553A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 1996 |
| Grant date | Mar 2, 1999 |
| Priority date | — |
| Expiry date | Oct 31, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a packaging arrangement suitable for semiconductor devices, a semiconductor chip is mounted on a surface of an aluminum base with a bonding layer interposed therebetween. The aluminum base has a capability to favorably dissipate heat from the semiconductor chip. The bonding layer consists of a resilient and heat conductive material such as silicone resin mixed with silver powder so that thermal strain of the metal base is accommodated by the resiliency of the bonding layer, and is prevented from adversely affecting the electronic component chip even though the aluminum base demonstrates a substantially more significant thermal expansion than the semiconductor chip. It is therefore possible to achieve a high reliability in the packaging of semiconductor devices at a minimum cost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.