System and method for controlling a slave processor
US5878216A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 1995 |
| Grant date | Mar 2, 1999 |
| Priority date | — |
| Expiry date | May 1, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/14
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system and method for controlling a slave processor from a master processor in which the slave processor is instructed to await the occurrence of a particular event and the arrival of a number of data words before processing additional requests. A wait request from the master processor includes identification of an event which must occur before processing is to resume. The master processor provides a number to a register accessible to the slave processor to indicate how many data words to await. The slave processor discontinues processing upon receiving the wait request. The slave processor detects the occurrence of the event and the arrival of the data words and then resumes processing. The register may include an indicator or flag that indicates when the number of data words set by the master processor has been received.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.