Low power serial protocol translator for use in multi-circuit board electronic systems
US5878234A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 10, 1996 |
| Grant date | Mar 2, 1999 |
| Priority date | — |
| Expiry date | Sep 10, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A low power reduced size serial device protocol translator including a slave controller and detection circuit for detecting start and stop conditions on serial data (SDA) and serial clock (SCL) lines in a serial communication system is described. The start and stop condition detector includes two flip-flops; one for providing a signal that indicates when a start condition has occurred on the SDA and SCL lines and another for indicating when a stop condition has occurred. Each of the flip-flops have their data inputs coupled to a high logic level and their enable input coupled to the serial clock line. The first flip-flop for indicating the start condition has its clock input coupled to the inverse of the serial data signal and the second flip-flop for indicating the stop condition has its clock input directly coupled to the serial data signal. As a result, the first and second flip-flops are only enabled and clocked when either a start or stop condition is occurring, resulting in an extremely low power slave controller detection system. The translator of the present invention translates serial signals between slave and master devices having different protocol types. The translator …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.