Method and apparatus for indexing patterned sparse arrays for microprocessor data cache
US5878424A · kind A · utility
7Cited by
7References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 24, 1996 |
| Grant date | Mar 2, 1999 |
| Priority date | — |
| Expiry date | Jan 24, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S707/99945
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for storing and accessing a patterned array of data for a storage device, includes inputting the array, an upper bandwidth and a lower bandwidth, defining a band within the array based on the upper bandwidth and the lower bandwidth, areas of the array outside the band contain zero value data elements. The upper bandwidth, the lower bandwidth and data within the band are stored in the storage device, and the array is reproduced based on the upper bandwidth the lower bandwidth and the data within the band.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.