Semiconductor devices
US5880483A · kind A · utility
Inventors
Key dates
| Filing date | Feb 23, 1993 |
| Grant date | Mar 9, 1999 |
| Priority date | — |
| Expiry date | Feb 23, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02315
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A field effect transistor having a substrate supporting an active layer comprising a Group III-V material. The active layer has a dopant concentration with a source electrode and a drain electrode disposed over and with a gate electrode disposed between the source and drain electrodes in Schottky barrier contact to the active layer. A surface layer portion of the active layer has a negatively charged surface potential disposed between the drain and gate electrodes comprised of said Group III-V material and oxygen. The surface layer portion has a thickness in the range of 25 .ANG. to 35 .ANG.. A layer of passivation material is disposed at least on the surface layer portion of the active layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.