High-efficiency voltage booster circuit operating at very low supply voltage
US5880628A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 1997 |
| Grant date | Mar 9, 1999 |
| Priority date | — |
| Expiry date | Jan 14, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/07
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A voltage booster circuit including a pull-up capacitor connected to the supply line via a PMOS switching transistor. The other terminal of the pull-up capacitor is supplied with a pull-up voltage switching between a first value determining charging of the capacitor, and a second value higher than the first and determining pull-up of the capacitor. A negative voltage source presents an output connected to the control terminal of a switch transistor, and generates a negative voltage of a value lower than the first pull-up voltage value when charging the capacitor, so as to saturate the switch transistor and charge the capacitor to a voltage close to the supply voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.