Carrier phase synchronization by reverse playback
US5881110A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 29, 1996 |
| Grant date | Mar 9, 1999 |
| Priority date | — |
| Expiry date | Nov 29, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0081
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A digital demodulator (10) reads symbol samples into a memory buffer (38) that can be played forward and backward into a phase locked loop (48). During an initial non-data directed symbol timing estimating phase (56) the demodulator (10) achieves an approximate frequency synchronization and starts to achieve phase synchronization on an incoming stream of symbols. During a first forward readout pass (58) of stored samples, the phase locked loop (48) begins the frequency and phase convergence. During subsequent pass (60) using a reverse readout of stored samples, phase locked loop (48) continues to converge toward zero phase error. Then another forward pass (66), phase locked loop (48) achieves usable frequency and phase synchronization of carrier and begins valid data extraction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.