Method and apparatus for handling invalid opcode faults via execution of an event-signaling micro-operation
US5881279A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 25, 1996 |
| Grant date | Mar 9, 1999 |
| Priority date | — |
| Expiry date | Nov 25, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3861
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor that handles invalid opcodes via an event-signaling micro-operation is disclosed. The microprocessor comprises a decoder that decodes macroinstructions, including an opcode, into a single microprocessor cycle micro-operation. The decoder detects invalid opcodes and replaces the invalid opcodes with an event-signaling micro-operation that triggers an invalid opcode assist. The invalid opcode assist triggers an invalid opcode exception handler that processes the invalid opcode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.