Circuit configuration for generating a reference potential
US5883543A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 12, 1997 |
| Grant date | Mar 16, 1999 |
| Priority date | — |
| Expiry date | May 12, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/30
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A circuit configuration for generating a reference potential includes a first transistor with an emitter connected to a ground potential and a base and a collector connected to one another. A second transistor has a base connected to the base of the first transistor. A first resistor is connected between the collector of the first transistor and an output terminal for picking up the reference potential. A second resistor is connected between the collector of the second transistor and the output terminal. A third resistor is connected between the emitter of the second transistor and the ground potential. A third transistor has a base connected to the collector of the second transistor and an emitter connected to the ground potential. A controlled current source is connected between a supply potential and the output terminal and is coupled on the input side to the collector of the third transistor. A capacitor is connected parallel to the second resistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.