Analog to digital converter using up/down counter and digital feedback
US5883590A · kind A · utility
7Cited by
3References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 4, 1997 |
| Grant date | Mar 16, 1999 |
| Priority date | — |
| Expiry date | Apr 4, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/48
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog to digital converter includes a comparator, an up/down counter and a pulse width modulator. The analog input to the comparator initially causes the counter to count up. The counter output is the converted digital word. The word is used to vary the modulation duty cycle of the modulator output which is compared with the analog input to the comparator. When the modulator output exceeds the analog input, the comparator output changes and the counter counts down, maintaining a digital output from the counter at the value of the converted analog signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.