System for maintaining fixed-point data alignment within a combination CPU and DSP system
US5884092A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 1996 |
| Grant date | Mar 16, 1999 |
| Priority date | — |
| Expiry date | Oct 4, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30043
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In microcomputers and digital signal processors in which a central processing unit for controlling the entire system and a digital signal processing unit having a product sum function required to process digital signals efficiently are mounted on one and the same chippthis invention prevents an increase in the number of processing steps caused by differing types of data handled by the calculators, thereby enhancing the efficiency of the digital signal processing. The digital signal processing unit is made a calculation unit that handles fixed-point data, and an instruction calling for execution of a fixed-point data calculation is provided separately from the conventional integer calculation instruction. When, in the data transfer between the digital signal processing unit and memories or external circuits, data shorter in bit length than the calculation precision is transferred, the calculation unit has a function to input and output data to and from the higher-order side of the register in which the data is stored and the fixed point data transfer instruction is provided separately from the conventional integer data transfer instruction. This invention can eliminate additional co…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.