Semiconductor device and pattern including varying transistor patterns for evaluating characteristics
US5886363A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 1997 |
| Grant date | Mar 23, 1999 |
| Priority date | — |
| Expiry date | Nov 4, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
To provide a simulation method capable of efficiently evaluating reliability of gate oxide films formed on the elements within short periods of time to evaluate characteristics of a semiconductor device made up of elements of any size and any number. In a semiconductor device having transistors formed thereon, a pattern 1 for evaluating characteristics of a semiconductor device characterized in that gate area portions 9, gate bird's-beak portions 10 and LOCOS bird's-beak portions 11, are factors affecting the insulation breakdown of the gate oxide film, are rendered to be variable, so that the shapes of these portions can be handled as independent parameters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.