Temperature insensitive foldback network
US5886511A · kind A · utility
1Cited by
25References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 21, 1998 |
| Grant date | Mar 23, 1999 |
| Priority date | — |
| Expiry date | Feb 21, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/468
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A foldback circuit which responds to a voltage differential between the input and output terminals of a voltage regulator in excess of a foldback threshold by lowering the current limit threshold of a current limit circuit. The foldback circuit includes a transistor with a base coupled to the input voltage and an emitter coupled to the output voltage. The collector when conducting provides a current that decreases the current limit threshold. Diodes in the path between the input and output voltages through the transistor may be used in establishing the foldback threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.