Idle state detector and idle state detecting method for a microprocessor unit for power savings
US5887178A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 1995 |
| Grant date | Mar 23, 1999 |
| Priority date | — |
| Expiry date | Aug 28, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An instruction address that is referred to by a microprocessor unit is inputted over an instruction address bus and is stored. While counting the number of times a clock is fed to the microprocessor unit, a comparison is made between the stored instruction address and an instruction address that the microprocessor provides onto the instruction address bus. A clock count value, obtained at the time when the aforesaid instruction addresses agree, is stored. If a stored instruction address and an instruction address on the instruction address bus agree for every stored clock count value, then the microprocessor is judged to repeatedly execute a sequence of instructions and the loop count value is incremented by one. When the loop count value exceeds a predetermined value, the microprocessor is judged to be placed in an idle state and the clock frequency is lowered.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.