Hierarchical carry-select, three-input saturation
US5889689A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 1997 |
| Grant date | Mar 30, 1999 |
| Priority date | — |
| Expiry date | Sep 8, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/49921
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is disclosed a first adder subtractor combines the largest positive number or largest negative number capable of being represented by the number of bits in the datapath, as determined by the sign of an input to a second adder with a first input to generate a first potential sum. A second adder operating in parallel with the first adder combines first, second and third inputs to generate a second potential sum. An overflow detector combines the first and second inputs of the second adder to determine if there is an overflow. If an overflow is not present, a multiplexer selects the output of the second adder as the output to be saturated. If an overflow is present, the multiplexer selects the output from the first adder as the output to be saturated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.