Methods and apparatus for error correction
US5889793A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 27, 1997 |
| Grant date | Mar 30, 1999 |
| Priority date | — |
| Expiry date | Jun 27, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/151
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An error correction decoder which includes a syndrome calculator, an error locator polynomial calculator, a standard error locator polynomial calculator, an error transform calculator and an inverse error transform calculator. These error correction decoder calculators provide a pipelined architecture for performing Reed-Solomon error correction calculations quickly. The error locator polynomial calculator includes an R-Q calculator, a .lambda.-.mu. calculator, an R-Q degree calculator and a trigger circuit. These calculators and the trigger circuit can be implemented each as a plurality of generic cells. The number of generic cells can be changed to construct Reed-Solomon circuits for different Reed-Solomon codes. The R-Q, .lambda.-.mu. and R-Q degree calculators provide adaptive circuits that use switches and multiplexors, for example, to adapt to perform appropriate calculations based upon the nature of the error correction polynomials applied to the inputs of the calculators. The R-Q, .lambda.-.mu. and R-Q degree calculators use multipliers, adders, memory elements and/or delay elements to perform the appropriate calculations. The calculations performed are controlled by select…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.