Method and apparatus for sequencing computer instruction execution in a data processing system
US5889999A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 1996 |
| Grant date | Mar 30, 1999 |
| Priority date | — |
| Expiry date | May 15, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/865
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for sequencing computer instructions in memory (24) to provide for more instruction efficient execution by a central processing unit (CPU) (22) begins by executing the computer instructions via the CPU (22) and creating a trace file (FIG. 2) in memory (24). The trace file is then scanned using a window size greater than two (i.e., more than two instructions or basic blocks/ groups of instructions are selected as each window) and correlations are determined between several pairs of instructions in each window (FIGS. 9 and 10). The correlations obtained by the window procedure are then analyzed (FIG. 11) to determine an efficient ordering of computer instructions for subsequent execution by any target CPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.