Process for conductors with selective deposition
US5891804A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 1997 |
| Grant date | Apr 6, 1999 |
| Priority date | — |
| Expiry date | Apr 14, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This is a method of forming a conductor 26 on an interlevel dielectric layer 12 which is over an electronic microcircuit substrate 10, and the structure produced thereby. The method utilizes: forming an intralevel dielectric layer 14 over the interlevel dielectric layer 12; forming a conductor groove in the intralevel dielectric layer 14 exposing a portion of the interlevel dielectric layer 12; anisotropically depositing a selective deposition initiator 24 onto the intralevel dielectric layer 14 and onto the exposed portion of the interlevel dielectric layer 14; and selectively depositing conductor metal 26 to fill the groove to at least half-full. The selective deposition initiator 24 may selected from the group consisting of tungsten, titanium, paladium, platinum, copper, aluminum, and combinations thereof. In one embodiment, the selective deposition initiator 24 is paladium, and the selectively deposited conductor metal 26 is principally copper.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.