Device for the bus-networked operation of an electronic unit with microcontroller, and its use
US5892893A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 1997 |
| Grant date | Apr 6, 1999 |
| Priority date | — |
| Expiry date | Mar 26, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device for bus-networked operation of an electronic unit having microcontroller has a semiconductor circuit which is supplied from a superordinate potential, and is connected between a bus protocol module of the microcontroller and the cores of a two core bus. The semiconductor circuit, which has at least two operating modes, "transmission and reception" (NORMAL) and "sleep" (SLEEP), compromises: a receiving circuit connected to the two bus cores, whose output communicates with a reception input of the bus protocol; a transmitting circuit coupled to receive the transmission output of the bus protocol function; a wake-up identification circuit connected to the cores of the two core bus, and having a wake-up input and switching means for providing, at a control output, a switch-on signal after identification of a wake-up signal from the wake-up input or from the bus, and for emitting a switch-off signal in the SLEEP mode. A voltage regulator, supplied from superordinate potential, provides a regulated output voltage to the microcontroller and to the bus protocol module. The voltage regulator has a control input which communicates with the control output of the semiconductor circuit…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.