Digital bus
US5892933A · kind A · utility
66Cited by
3References
22Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 31, 1997 |
| Grant date | Apr 6, 1999 |
| Priority date | — |
| Expiry date | Mar 31, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4018
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A segmenting scheme and arrangement for digital serial busses such as an I.sup.2 C bus is provided. The segments are broken apart from the master unit by a switch such as a low-impedance bidirectional analog multiplexer. The bus may be of various types such as an I.sup.2 C, a Universal Serial Bus or other similar types of busses. The bus is bidirectional from the various slave or downstream units to the master unit and the various slave devices can operate at different speeds by allowing each segment to adjust the speed of that segment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.