Virtual memory system for vector based computer systems
US5895501A · kind A · utility
47Cited by
6References
38Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 3, 1996 |
| Grant date | Apr 20, 1999 |
| Priority date | — |
| Expiry date | Sep 3, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/652
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A virtual memory management system for a vector based processing system detects early page or segment faults allowing pipelined instructions to be halted and resumed once the pages or segments required for a job are available in main storage. A multiplier is used for stride accesses, and min and max registers are used for gather/scatter instructions to provide a range of addresses to be accessed during a job. These ranges are determined early enough in execution of instructions related to a job to allow saving the state of the processor and resuming execution of the instructions once the data is available in main storage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.