Semiconductor device
US5895887A · kind A · utility
6Cited by
9References
5Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Jul 21, 1997 |
| Grant date | Apr 20, 1999 |
| Priority date | — |
| Expiry date | Jul 21, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In order to reduce the chip size of a semiconductor device as well as to separate noises between at least two types of pads having different functions, power supply pins and ground pins are provided on opposite edges of a package with input address pins being arranged therebetween and output data pins being arranged outside the same. Control pins and a nonconnected excess pin are arranged in the center. This allows the package to omit wires and reduce chip size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.