Error correction apparatus and method
US5898708A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 1995 |
| Grant date | Apr 27, 1999 |
| Priority date | — |
| Expiry date | Jun 16, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/47
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
When a receiver unit receives second data composed of check bits and first data obtained by encoding information bits indicating the communication contents by way of a first generator matrix based on a first generating polynomial, and then further encoding the first data by way of a second generator matrix of an irreducible standard form based on a second generating polynomial, an error location detector decodes the second data received by way of a second check matrix that is orthogonal to the second generator matrix so as to detect errors produced in the first data. A dummy syndrome generator generates a dummy syndrome of the error produced in the information bits based on the detected error location and on the first generating polynomial. A syndrome generator takes the product of the data obtained by excluding the check bits from the second data received by the receiver unit and the first check matrix that is orthogonal to the first generator matrix so as to generate a syndrome that indicates the error syndrome produced in the information bits. Finally, an error corrector corrects errors produced in the information bits if the dummy syndrome generated by the dummy syndrome genera…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.