Inter-processor communication
US5898841A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 18, 1997 |
| Grant date | Apr 27, 1999 |
| Priority date | — |
| Expiry date | Feb 18, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/326
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A multi-processor system has a number of processing elements interconnected by a network for transmitting data frames between the elements. Each element includes an application layer, a transport layer and a link layer. The application layer contains end-point processes each having an address space. The transport layer can allocate a buffer in the address space of a specified end-point process and return details of the buffer to the link layer. The link layer can write message data from a received data frame directly into the allocated buffer by direct memory access without buffering the message data in the link layer. In this way, copying is reduced, improving the efficiency of the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.