Address shadow feature and methods of using the same
US5898859A · kind A · utility
20Cited by
13References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 1, 1996 |
| Grant date | Apr 27, 1999 |
| Priority date | — |
| Expiry date | Oct 1, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An address shadow feature and methods of using the same. A slave controller of the present invention includes an address register coupled to receive a device address from a secondary bus interface. A match circuit is coupled to the address register and compares the device address to a shadow address, generating a match signal upon detection of a match between the shadow address and the device address. An interrupt generation circuit generates an interrupt signal in response to the match signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.