Method and apparatus for data ordering of I/O transfers in Bi-modal Endian PowerPC systems
US5898896A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 1997 |
| Grant date | Apr 27, 1999 |
| Priority date | — |
| Expiry date | Apr 10, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4013
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
To present a consistent image of storage facilities to components in Bi-modal Endian PowerPC system enviromnents, provision is made for transferring data between system components in the appropriate Endian format. Endian conversion function can be incorporated into the memory controller subsystem by adding byte-lane swapping logic on the inbound and outbound I/O data paths. With this structure, inbound data from the processor and memory bus will be converted to true Little Endian order before being sent to I/O devices. Likewise, true Little Endian data from I/O devices targeted for the processor or memory is modified to reflect the PowerPC Little Endian byte ordering convention.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.