Method and apparatus for the manufacture of a semiconductor integrated circuit device having discontinuous insulating regions
US5899729A · kind A · utility
21Cited by
9References
11Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 30, 1997 |
| Grant date | May 4, 1999 |
| Priority date | — |
| Expiry date | Sep 30, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/78
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor wafer having an active surface separated into device regions with semiconductor chips formed thereon and scribe regions formed between the device regions. The wafer includes an insulating layer formed on the active surface in the device regions. The insulating layer has a first edge and a second edge oriented in a confronting relationship. The first edge and the second edge end at the scribe regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.