Flexible translation storage buffers for virtual address translation
US5899994A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 1997 |
| Grant date | May 4, 1999 |
| Priority date | — |
| Expiry date | Jun 26, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S707/959
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A technique for managing address translation storage buffers (TSBs) supports multiple pools of different TSB sizes and dynamically assigns a process to its own TSB of the proper size as the needs of the process change. A process is assigned a small TSB and the system migrates the process to a larger TSB if needed. One method includes the steps of identifying sizes of TSBs to support, allocating a TSB pool in memory with these sizes, selecting an appropriately sized TSB for a process, and migrating that process to a larger size should the process require more memory. A second method allocates a TSB pool by determining an appropriate size for the TSB pool, determining sizes of TSBs to support, allocating memory for the pool and initializing status block for each size of TSB. A third method selects an appropriate TSB for a process by selecting a smallest supported size of a TSB from the pool. A fourth method migrates a process to a larger size by determining whether the current TSB is of an inappropriate size, selecting a larger TSB size, invalidating the previous TSB, and selecting a TSB of the new size from the TSB pool. Variations on these methods require that the memory spaces sha…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.