Flat device and display driver with on/off power controller used to prevent damage to the LCD
US5903260A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 2, 1996 |
| Grant date | May 11, 1999 |
| Priority date | — |
| Expiry date | Jan 2, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S345/904
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Signal management control units 47.sub.1 -47.sub.n of respective scan drivers LSI in an LCD module are cascade-connected and each have the same construction. A detected signal of the signal management control unit 47J is a data signal latch clock LP applied to a terminal CKB.sub.1. A detected signal of the signal management control unit 47.sub.2 is a frame start signal SP applied to a terminal CKB.sub.2. A detected signal of the signal management control unit 47n is an AC-transforming clock FR applied to a terminal CKBn. The signal management control unit 47.sub.1 includes a signal stop detection circuit 48 serving as a signal detection means for detecting a stop of the detected signal and a sequence processing circuit 51 consisting of a signal delay circuit 49 and a logic circuit 50. When stopping oscillations of, e. g., the frame start signal SP, outputs T.sub.1 -T.sub.n of the circuit 51 change to an L level. Hence, a display-off signal DF of the LCD module assumes the L level. A liquid crystal panel is forcibly set in a display-off mode. As a result, even if the frame start signal SP is stopped due to some cause, a liquid crystal application voltage is set down to zero. It is, …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.