Frequency domain kernel processor
US5903483A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 1997 |
| Grant date | May 11, 1999 |
| Priority date | — |
| Expiry date | Aug 12, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The frequency domain kernel processor of the present invention comprises a cheduler for selecting samples from blocks of Fourier transform coefficients in a predetermined sequence and for outputting the selected samples as serial terms s and as parallel terms u. A transform processor is coupled to the scheduler to receive the terms s and u. The transform processor comprises transform calculators for calculating output values p and f as functions of terms s and u to model the interference and to reveal the desired signal, a first sum calculator for calculating a sum of p values, a second summing calculator for calculating a sum of f values, and a divider for calculating, the quotient of the sum of p values divided by the sum of f values. An output buffer stores the outputs of the divider for formatting as a spectral display.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.