Method of fabricating a CMOS transistor

US5904520A · kind A · utility

Assignee

• Utek Semiconductor Corp. · TW

Inventors

• Shiou-han Liaw · Hsinchu, TW
• Feng-Ling Hsiao · Xingying, TW

Key dates

• Filing date: Jan 5, 1998
• Grant date: May 18, 1999
• Expiry date: Jan 5, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0181

Abstract

A gate oxide and a first conducting layer are formed on a substrate, and then the first conducting layer is patterned and a gate in a NMOS region is formed. A LDD, a sidewall spacer, and a drain/source in the NMOS region are then formed in series. A layer of hard mask is formed. The layer of hard mask and the first conducting layer are patterned and a gate in a PMOS region is formed. A LDD, a sidewall spacer, and a drain/source in the NMOS region are then formed in series.