Fuse refresh circuit
US5905687A · kind A · utility
9Cited by
6References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 1, 1997 |
| Grant date | May 18, 1999 |
| Priority date | — |
| Expiry date | Aug 1, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/789
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The fuse refresh circuit for semiconductor memories has a set circuit for setting a fuse latch circuit. The fuse latch circuit is set by the set circuit in at least one refresh cycle after a voltage supply has been switched on. During the refresh cycle of the fuse latch circuit, the latter is driven with pulses in such a way that the state of the fuse latch circuit is evaluated and only an incorrectly set fuse latch circuit is set to be correct.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.