Memory device with an externally selectable-width I/O port and systems and methods using the same
US5906003A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 17, 1996 |
| Grant date | May 18, 1999 |
| Priority date | — |
| Expiry date | Apr 17, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device for storing variable width data words. The memory device (200) comprises an array (201) of memory cells, an address latch (207) for receiving and latching a first address word from an external source, address decoding circuitry (202, 204) for accessing a selected storage location in the array (201) corresponding to the first address word stored in the address latch (207), and mode decode circuitry (220) operable in response to a received code to selectively modify the first address word stored in the address latch (207) to generate a second address word corresponding to a second selected storage location in the array (201).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.