Method for reducing processor interrupt processing time by transferring predetermined interrupt status to a system memory for eliminating PIO reads from the interrupt handler
US5907712A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 30, 1997 |
| Grant date | May 25, 1999 |
| Priority date | — |
| Expiry date | May 30, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus are provided for reducing processor interrupt processing time in a data processing system. The data processing system includes a system processor, a system memory and an adapter coupled to the system processor and the system memory. The adapter checks for an interrupt condition. Responsive to identifying an interrupt condition, the adapter transfers predetermined interrupt status information to the system memory. Then the adapter raises an interrupt to the system processor. The adapter uses a direct memory access (DMA) descriptor or a source address and a destination address to move the predetermined interrupt status information to the system memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.