Low-distortion technique to bandlimit a switched-capacitor sampling circuit
US5909131A · kind A · utility
11Cited by
5References
35Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 31, 1996 |
| Grant date | Jun 1, 1999 |
| Priority date | — |
| Expiry date | Jul 31, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a switched-capacitor input sampling structure, a resistor connected in series with the input structure, but after the output of the input switch limits the noise bandwidth of the input structure. The selected placement of the resistor does not appreciably limit the slewing or settling time of downstream circuit elements, resulting in a low noise bandwidth, high speed system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.