Method and apparatus for reading analog values stored in floating gate NAND structures
US5909393A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 1997 |
| Grant date | Jun 1, 1999 |
| Priority date | — |
| Expiry date | Jul 1, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This invention utilizes the small cell size of the NAND storage cell structure in an analog storage and playback device. This is achieved, in part, by using a special, zero current storage cell, in which in the read mode, the cell loading current is waveshaped to attain an optimal dynamic range and to avoid the resistive effects of series parasitic resistances of other transistors in the source node or drain node, and to avoid the transistor conductance variations of all the transistors in the read path. The loading current is waveshaped to reduce possible overshoot and settling effects to achieve the fine output voltage resolution in an optimal sensing time. Details of the method and alternate embodiments are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.