Patent · US Expired

System and method for providing scan chain for digital electronic device having multiple clock domains

US5909451A · kind A · utility

54Cited by
2References
38Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 21, 1996
Grant dateJun 1, 1999
Priority date
Expiry dateNov 21, 2016

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/318594
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A digital electronic circuit device comprises a plurality of circuit elements, a scan chain establishment element, and a unitary clock domain establishment element. The plurality of circuit elements define a plurality of clock domains, and circuit elements in each clock domain perform processing operations under control of a respective domain clock signal. The scan chain establishment element interconnects the circuit elements in a scan chain to facilitate loading and/or retrieval of a scan vector into and/or out of the digital circuit device. The unitary clock domain establishment element establishes a unitary clock domain for the circuit element when the scan chain establishment element is interconnecting the circuit elements in a scan chain. Thus, the scan vector will be loaded into or retrieved from the digital electronic circuit device using the single, unitary clock signal, thereby avoiding any necessity of using synchronizers or other elements for the scan chain which can complicate layout of the device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.