Single-chip software configurable transceiver for asymmetric communication system
US5909463A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 1996 |
| Grant date | Jun 1, 1999 |
| Priority date | — |
| Expiry date | Nov 4, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q2213/1332
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A transceiver (5) for an asymmetric communication system such as asymmetric digital subscriber line (ADSL) includes a configuration register (71) defining operation at either a central office (CO) or a remote terminal (RT). The configuration register (71) includes a control bit (72) for selecting either CO or RT mode. The transceiver (5) includes a signal processing module (70) configured according to the state of the control bit (72). For example, a digital interface (70) converts transmit data into transmit symbols and converts received symbols into receive data. The digital interface (70) uses a large memory (158) as a buffer in the transmit path and a small memory (160) as a buffer in the receive path in CO mode. In RT mode, the digital interface (70) uses the small memory (160) in the transmit path and the large memory (158) in the receive path. The selective configuration allows a single integrated circuit to be used in both CO and RT equipment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.