Digital circuit clocking using a dual side band suppressed carrier clock modulated signal
US5909472A · kind A · utility
7Cited by
2References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 30, 1996 |
| Grant date | Jun 1, 1999 |
| Priority date | — |
| Expiry date | Oct 30, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2215/067
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In a computer or other digital system a double side band suppressed carrier (DSB-SC) signal is derived from a clock or other synchronous signal. The clock or other synchronous signal is amplitude modulated at a source using a broadband low frequency envelope signal. The modulated signal is the DSB-SC signal, which then serves as a clock or other synchronous signal for the source and/or a destination circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.