Computing system with exception handler and method of handling exceptions in a computing system
US5909574A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 23, 1997 |
| Grant date | Jun 1, 1999 |
| Priority date | — |
| Expiry date | Dec 23, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3863
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing system in which permanent state changes to portions of the system are effected using transactions, including an exception handier and a method of handling exceptions in such a system is disclosed. Specifically, the computing system comprises a processor for executing at least one process; and scratchpad memory. A transactional subsystem is interconnected with the processor and has a plurality of states. State changes to the transactional subsystem are made irreversible only upon successful completion of a transaction. Program memory interconnected with the processor contains an exception handler for handling an exception dependent on one of a transaction. The handler adapts the processor to buffer data resulting from the exception in the scratchpad memory; and upon successful completion of the transaction, transfer the buffered data to an exception buffer accessible by a software process executing on the processor. Upon unsuccessful completion of the transaction, the buffered data in the scratchpad memory is discarded. Preferably, the transactional subsystem is a shared memory system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.