Method for fabricating a semiconductor device having a refractory metal pillar for electrical connection
US5910020A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 18, 1996 |
| Grant date | Jun 8, 1999 |
| Priority date | — |
| Expiry date | Dec 18, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method for fabricating a semiconductor device which prevents generation of imperfections in an aluminum alloy as an upper wiring even when part of a refractory metal pillar, which fills in a contact hole connecting lower and upper wiring layers, is exposed due to displacement of the upper wiring layer. The method comprises forming a third insulation film, a second insulation film and a second wiring layer, on a first wiring layer, forming holes which extend to the first wiring layer therethrough, forming refractory metal pillars by filling in the holes with a refractory metals, and forming a fourth insulation film. The second wiring layer is formed within a groove formed by removing the third and fourth insulation films to expose top and side surfaces of the refractory metal pillar. Even when displacement is caused between the refractory metal pillar and the second wiring layer, the reliability does not decrease, since the refractory metal pillars are covered with the fourth insulation film. The second wiring layer is preferably formed by polishing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.