Circuits, systems and methods for modifying data stored in a memory using logic operations
US5910919A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 1997 |
| Grant date | Jun 8, 1999 |
| Priority date | — |
| Expiry date | Jul 30, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system 104 includes an array 200 of memory calls arranged in rows and columns and circuitry 208 for selectively performing logic operations on a bit of data stored in a selected call using a bit of received modifying data and a mode data bit for selecting a logic operation for performance. Circuitry 208 for modifying during an OR logic operation writing bit of the modifying data into the cell when the bit of modifying data is a logic one and maintaining an existing bit stored in call when the bit of modifying data is a logic zero. Memory system 104 further includes circuitry 207, 210 for receiving and latching the mode data and the modifying data through a single port.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.