Operation control circuit of power supply unit
US5912565A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 1996 |
| Grant date | Jun 15, 1999 |
| Priority date | — |
| Expiry date | Dec 27, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1534
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The disclosure is an operation control circuit of a power supply unit in a memory device which outputs a given operation control signal used for supplying a power supply voltage when a main control signal of the memory device is operating and additionally outputs the operation control signal in response to a sub control signal driven when the main control signal does not operate. The aforementioned operation control circuit includes: a pulse generator receiving the sub control signal to output a first and a second pulse signals; a latch receiving the first pulse signal of the pulse generator; a delay sensing circuit receiving the first and second pulse signals of the pulse generator to sense whether or not the sub control signal is continuously applied, and resetting the latch after a given time of delay; and an actuating signal generator of a power supply unit generating an operation control signal for making the power supply unit operate even when the sub control signal is continuously input during a given period of time as well as when the main control signal is operating.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.