Method and apparatus for distributing a clock tree within a hierarchical circuit design
US5912820A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 22, 1997 |
| Grant date | Jun 15, 1999 |
| Priority date | — |
| Expiry date | Jan 22, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for distributing clock drivers within a hierarchical circuit design, wherein the clock drivers are concentrated in locations where they are actually needed rather than uniformly distributed throughout the circuit design. In an exemplary embodiment, the actual clock loads within a selected hierarchical region are determined, and a sufficient number of clock drivers are added as children objects to the selected hierarchical region. Since many placement tools may place the children objects within an outer boundary of the corresponding parent object, the clock drivers, as children objects of the selected hierarchical region, may be placed within the outer boundary of the selected hierarchical region. Accordingly, the clock drivers may be concentrated in the locations where actually needed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.