Dual processor automotive control system having flexible processor standardization
US5916296A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 5, 1996 |
| Grant date | Jun 29, 1999 |
| Priority date | — |
| Expiry date | Jun 5, 2016 |
Classification
- Technology area (CPC F)Mechanical Engineering; Lighting; Heating
- CPC primaryF02D41/266
- WIPO fieldEngines, pumps, turbines
- WIPO sectorMechanical engineering
Abstract
To execute high-accuracy control employing communication data of a microprocessor while attempting standardization of the microprocessor, a host microprocessor is provided with a ROM, RAM, CPU, and DMA controller, and a KCS microprocessor is provided with a ROM, RAM, CPU, and DMA controller. The host microprocessor and the KCS microprocessor are connected by a bidirectional communication line. At a predetermined cycle, the CPU of the host microprocessor sends data in the ROM relating to the content of control of the KCS microprocessor to the RAM of the KCS microprocessor. Engine information (A/D values and so on) are sent from the KCS microprocessor to the host microprocessor at a cycle of 4 ms, but sending of ROM data from the host microprocessor to the KCS microprocessor is performed during free time in this sending cycle. The ROM data is divided into a plurality of blocks, and the data is sent block by block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.