Flat panel imaging device
US5917210A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 1997 |
| Grant date | Jun 29, 1999 |
| Priority date | — |
| Expiry date | Jun 30, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/1368
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A novel thin film transistor (TFT) structure for minimizing parasitic capitances on both the drain and source electrodes. According to a first embodiment, a triple gate TFT is provided with an open gate structure in which the source and drain electrodes are non-overlapping with the top gate electrode. A pair of bottom gate electrodes being aligned respectively with the first gap between the gate and source and the second gap between the gate and drain. According to a second embodiment of the invention, a full transfer TFT switch is provided having a source, a drain, a bottom gate and semi-conductor layer therebetween, and a partial top gate overlapping a portion of the drain and a portion of the semiconductor layer for creating a generally triangular-shaped charge density distribution in the semiconductor layer for moving channel electrons toward the source electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.