Method and output buffer with programmable bias to accommodate multiple supply voltages
US5917358A · kind A · utility
9Cited by
6References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 9, 1997 |
| Grant date | Jun 29, 1999 |
| Priority date | — |
| Expiry date | Dec 9, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018585
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Output buffer (100) translates input signals from one voltage range to a second voltage range. The second voltage range may be identical to the first range or may be greater. The particular range is programmable by one of several ways. This feature makes output buffer especially suitable for use in devices which must be compatible with two voltage ranges. Output buffer uses a bias generator (110) to limit the voltage across the gate oxide of its various transistors to a level which is consistent with the first voltage range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.