General purpose EOS/ESD protection circuit for bipolar-CMOS and CMOS integrated circuits

US5917689A · kind A · utility

Assignee

• Analog Devices, Inc. · US

Inventors

• Stephen English · Billerica, US
• Eric Nestler · Concord, US
• Andrew H. Olney · Burlington, US

Key dates

• Filing date: Sep 12, 1996
• Grant date: Jun 29, 1999
• Expiry date: Sep 12, 2016

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D89/911

Abstract

An apparatus and method for protecting integrated circuits from electrical overstress and eletrostatic discharge is provided. The apparatus includes a primary EOS/ESD protection device and a feedback circuit. The feedback circuit maintain the primary EOS/ESD protection device in an off state during normal operation of the integrated circuit and switches the primary protection device to an state when an EOS/ESD event occurs at a first input pad with respect to a second input pad of the integrated circuit.