Method for canceling partial line fetch for cache when new data is requested during current fetch and invalidating portion of previously fetched data
US5918247A · kind A · utility
6Cited by
9References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 27, 1997 |
| Grant date | Jun 29, 1999 |
| Priority date | — |
| Expiry date | Oct 27, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0859
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
When a processor (102) issues a request for an address (502), a determination is made as to whether or not the address is contained within a buffer (103) or cache associated with the processor (102), or the address is contained within a line of data currently being fetched from an external memory system (105). If the address is not contained within the buffer or cache and is not contained within a line being currently fetched, the current fetch will be cancelled (515, 516).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.